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Datasheet File OCR Text: |
REFIN REFOUT REFGND SDA SCL A1 A0 ADM1069 12-BIT SAR ADC VREF SMBus INTERFACE EEPROM CLOSED-LOOP MARGINING SYSTEM DUALFUNCTION INPUTS (LOGIC INPUTS OR SFDs) SEQUENCING ENGINE VP1 VP2 VP3 VH PROGRAMMABLE RESET GENERATORS (SFDs) CONFIGURABLE OUTPUT DRIVERS (LV CAPABLE OF DRIVING LOGIC SIGNALS) CONFIGURABLE OUTPUT DRIVERS (HV CAPABLE OF DRIVING GATES OF N-CHANNEL FET) PDO1 PDO2 PDO3 PDO4 PDO5 PDO6 VX1 VX2 VX3 VX4 PDO7 PDO8 AGND VOUT DAC VOUT DAC VOUT DAC VOUT DAC VDD ARBITRATOR PDOGND VDDCAP DAC1 DAC2 DAC3 DAC4 GND 10 F REFIN REFOUT REFGND SDA SCL A1 A0 ADM1069 VREF SMBus INTERFACE 12-BIT SAR ADC OSC DEVICE CONTROLLER EEPROM GPI SIGNAL CONDITIONING VX1 SFD CONFIGURABLE O/P DRIVER (HV) PDO1 PDO2 PDO3 PDO4 PDO5 VX2 VX3 GPI SIGNAL CONDITIONING SFD SELECTABLE ATTENUATOR SEQUENCING ENGINE CONFIGURABLE O/P DRIVER (HV) PDO6 VX4 VP1 VP2 VP3 VH AGND VDDCAP 10 F SFD CONFIGURABLE O/P DRIVER (LV) PDO7 SELECTABLE ATTENUATOR SFD CONFIGURABLE O/P DRIVER (LV) PDO8 PDOGND VDD ARBITRATOR REG 5.25V CHARGE PUMP VOUT DAC VOUT DAC GND 10 F VCCP DAC1 DAC2 DAC3 DAC4 32 25 24 PIN 1 INDICATOR VX1 VX2 VX3 VX4 VP1 VP2 VP3 VH 1 ADM1069 TOP VIEW (Not to Scale) 8 9 16 17 PDO1 PDO2 PDO3 PDO4 PDO5 PDO6 PDO7 PDO8 6 180 160 5 140 4 120 100 3 80 2 60 40 1 20 0 0 1 2 3 VVP1 (V) 4 5 6 0 0 1 2 3 VVP1 (V) 4 5 6 6 5.0 4.5 5 4.0 3.5 3.0 4 3 2.5 2.0 2 1.5 1.0 0.5 1 0 0 2 4 6 8 VVH (V) 10 12 14 16 0 0 2 4 6 8 VVH (V) 10 12 14 16 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 350 300 250 200 150 100 50 0.5 0 0 1 2 3 VVP1 (V) 4 5 6 0 0 1 2 3 VVH (V) 4 5 6 14 12 10 8 6 4 1.0 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 2 -0.8 0 0 2.5 5.0 7.5 10.0 12.5 15.0 ILOAD CURRENT ( A) -1.0 0 1000 2000 CODE 3000 4000 5.0 4.5 4.0 3.5 3.0 VP1 = 5V 2.5 VP1 = 3V 2.0 1.5 1.0 0.5 0 0 1 2 3 ILOAD (mA) 4 5 6 1.0 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 1000 2000 CODE 3000 4000 4.5 4.0 12000 9894 10000 3.5 VP1 = 5V 3.0 2.5 2.0 1.5 1.0 2000 0.5 25 0 0 10 20 30 ILOAD ( A) 40 50 60 0 2047 2048 CODE 2049 81 VP1 = 3V 6000 8000 4000 1.005 1.004 1.003 1.002 1.001 VP1 = 3.0V 1.000 VP1 = 4.75V DAC BUFFER OUTPUT 20k 47pF PROBE POINT 0.999 0.998 0.997 0.996 1 0.995 -40 CH1 200mV M1.00 s CH1 756mV -20 0 20 40 60 80 100 TEMPERATURE ( C) 2.058 2.053 VP1 = 3.0V 2.048 DAC 100k BUFFER OUTPUT PROBE POINT 1V VP1 = 4.75V 2.043 1 2.038 -40 CH1 200mV M1.00 s CH1 944mV -20 0 20 40 60 80 100 TEMPERATURE ( C) VDDCAP VP1 IN EN VP2 IN EN VP3 IN EN VH IN EN OUT 4.75V LDO INTERNAL DEVICE SUPPLY OUT 4.75V LDO OUT 4.75V LDO OUT 4.75V LDO SUPPLY COMPARATOR RANGE SELECT ULTRA LOW VPn VREF + - OV COMPARATOR GLITCH FILTER FAULT OUTPUT + LOW MID - UV FAULT TYPE COMPARATOR SELECT INPUT PULSE SHORTER THAN GLITCH FILTER TIMEOUT PROGRAMMED TIMEOUT INPUT PULSE LONGER THAN GLITCH FILTER TIMEOUT PROGRAMMED TIMEOUT INPUT INPUT T0 TGF T0 TGF OUTPUT OUTPUT T0 TGF T0 TGF VXn (DIGITAL INPUT) + DETECTOR - GLITCH FILTER TO SEQUENCING ENGINE VREF = 1.4V VFET (PDO1-6 ONLY) VDD VP4 CFG4 CFG5 CFG6 SEL VP1 SE DATA SMBus DATA CLK DATA PDO MONITOR FAULT STATE TIMEOUT SEQUENCE SEQUENCE STATES IDLE1 VX1 = 0 IDLE2 MONITOR FAULT STATES VP1 = 1 TIMEOUT STATES EN3V3 VP1 = 0 10ms VP2 = 1 EN2V5 (VP1 + VP2) = 0 20ms DIS3V3 VX1 = 1 VP3 = 1 PWRGD VP2 = 0 (VP1 + VP2 + VP3) = 0 DIS2V5 VX1 = 1 FSEL1 (VP1 + VP2) = 0 VP3 = 0 VX1 = 1 FSEL2 VP1 = 0 VP2 = 0 MONITORING FAULT DETECTOR 1-BIT FAULT DETECTOR VP1 SUPPLY FAULT DETECTION MASK SENSE FAULT 1-BIT FAULT DETECTOR VX4 VP1 SUPPLY FAULT DETECTION SEQUENCE DETECTOR LOGIC INPUT CHANGE OR FAULT DETECTION MASK SENSE FAULT VX4 LOGIC INPUT CHANGE OR FAULT DETECTION TIMER WARNINGS INVERT FORCE FLOW (UNCONDITIONAL JUMP) SELECT 04735-032 1-BIT FAULT DETECTOR WARNINGS FAULT MASK NO ATTENUATION VXn 12-BIT ADC DIGITIZED VOLTAGE READING 2.048V VREF VPn/VH ATTENUATION NETWORK (DEPENDS ON RANGE SELECTED) DIGITIZED VOLTAGE READING 12-BIT ADC 2.048V VREF CONTROLLER VIN ADM1069 DC/DC CONVERTER OUTPUT ATTENUATION RESISTOR DACOUTn VH/VPn/VXn MUX ADC DEVICE CONTROLLER (SMBus) FEEDBACK DAC GND PCB TRACE NOISE DECOUPLING CAPACITOR VIN CONTROLLER VOUT OUTPUT DC/DC CONVERTER FEEDBACK ATTENUATION RESISTOR DACOUTn ADM1069 DEVICE CONTROLLER (SMBus) DAC GND PCB TRACE NOISE DECOUPLING CAPACITOR 12V IN 5V IN 3V IN IN 12V OUT 5V OUT 3V OUT DC-DC1 EN VH 5V OUT 3V OUT 3.3V OUT 1.25V OUT 1.2V OUT 0.9V OUT VP1 VP2 VP3 VX1 VX2 VX3 OUT 3.3V OUT ADM1069 PDO1 PDO2 IN PDO3 PDO4 PDO5 PDO6 PDO7 POWER_GOOD SYSTEM RESET EN PDO8 DAC1 3.3V OUT IN OUT EN TRIM IN DC-DC2 EN OUT 1.25V OUT DC-DC3 OUT 1.2V OUT POWER_ON VX4 REFIN VCCP VDDCAP GND 0.9V OUT 10 F 10 F 10 F DC-DC4 SMBus POWER-UP (VCC > 2.5V) E E P R O M L D DEVICE CONTROLLER D A T A LATCH A R A M L D U P D LATCH B EEPROM FUNCTION (OV THRESHOLD ON VP1) 1 SCL 9 1 9 SDA 1 START BY MASTER 0 0 1 1 A1 A0 R/W ACK. BY SLAVE D7 D6 D5 D4 D3 D2 D1 D0 ACK. BY SLAVE FRAME 1 SLAVE ADDRESS 1 SCL (CONTINUED) SDA (CONTINUED) D7 D6 D5 D4 D3 D2 D1 D0 ACK. BY SLAVE D7 9 1 FRAME 2 COMMAND CODE 9 D6 D5 D4 D3 D2 D1 D0 ACK. BY SLAVE STOP BY MASTER FRAME 3 DATA BYTE FRAME N DATA BYTE 1 SCL 9 1 9 SDA 1 START BY MASTER 1 0 0 1 1 A1 A0 R/W ACK. BY SLAVE D7 D6 D5 D4 D3 D2 D1 D0 ACK. BY MASTER FRAME 1 SLAVE ADDRESS 9 1 FRAME 2 DATA BYTE 9 SCL (CONTINUED) SDA (CONTINUED) D7 D6 D5 D4 D3 D2 D1 D0 ACK. BY MASTER D7 D6 D5 D4 D3 D2 D1 D0 NO ACK. FRAME N DATA BYTE STOP BY MASTER FRAME 3 DATA BYTE tR SCL tF t HD ;STA t LO W t HD; STA t HD ;DA T t SU; DAT t HI G H t SU; S TA t SU ;ST O SDA t BU F P S S P 1 S 2 SLAVE ADDRESS W 3 A 4 REGISTER ADDRESS (0x00 TO 0xDF) 5 A 6 P 1 2 3 4 5 6 78 SLAVE S ADDRESS W A RAM ADDRESS A DATA A P (0x00 TO 0xDF) 1 S 2 SLAVE ADDRESS W 3 A 4 COMMAND BYTE (0xFE) 5 A 6 P 1 2 3 4 5 6 78 SLAVE S ADDRESS W A EEPROM EEPROM ADDRESS ADDRESS A AP LOW BYTE HIGH BYTE (0x00 TO 0xFF) (0xF8 TO 0xFB) 1 2 3 4 5 6 7 8 9 10 SLAVE S ADDRESS W A EEPROM EEPROM ADDRESS ADDRESS A LOW BYTE A DATA A P HIGH BYTE (0x00 TO 0xFF) (0xF8 TO 0xFB) 1 S 2 SLAVE ADDRESS R 3 A 4 DATA 5 A 6 P 1 2 3 4 5 6 7 8 9 10 BYTE SLAVE COMMAND 0xFC DATA DATA DATA A S WA A A A AP COUNT ADDRESS (BLOCK WRITE) 1 2 N 1 2 3 4 56 7 8 9 10 11 12 SLAVE COMMAND 0xFD SLAVE BYTE DATA S ADDRESS W A (BLOCK READ) A S ADDRESS R A COUNT A A 1 13 14 DATA A 32 P 1 2 3 4 56 7 8 9 10 11 12 SLAVE COMMAND 0xFD SLAVE BYTE DATA A S ADDRESS W A (BLOCK READ) A S ADDRESS R A COUNT A 1 13 14 15 DATA 32 A PEC A P 0.75 0.60 0.45 1.60 MAX 32 1 9.00 BSC SQ 25 24 PIN 1 TOP VIEW (PINS DOWN) 7.00 BSC SQ 1.45 1.40 1.35 0.15 0.05 SEATING PLANE 0.20 0.09 7 3.5 0 0.10 MAX COPLANARITY 8 9 16 17 VIEW A ROTATED 90 CCW VIEW A 0.80 BSC LEAD PITCH 0.45 0.37 0.30 COMPLIANT TO JEDEC STANDARDS MS-026-BBA |
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